Paper Info
Title
On the potential of significance-driven execution for energy-aware HPC
Abstract
Dynamic voltage and frequency scaling (DVFS) exhibits fundamental limitations as a method to reduce energy consumption in computing systems. In the HPC domain, where performance is of highest priority and codes are heavily optimized to minimize idle time, DVFS has limited opportunity to achieve substantial energy savings. This paper explores if operating processors near the transistor threshold voltage (NTV) is a better alternative to DVFS for breaking the power wall in HPC. NTV presents challenges, since it compromises both performance and reliability to reduce power consumption. We present a first of its kind study of a significance-driven execution paradigm that selectively uses NTV and algorithmic error tolerance to reduce energy consumption in performance-constrained HPC environments. Using an iterative algorithm as a use case, we present an adaptive execution scheme that switches between near-threshold execution on many cores and above-threshold execution on one core, as the computational significance of iterations in the algorithm evolves over time. Using this scheme on state-of-the-art hardware, we demonstrate energy savings ranging between 35 and 67 %, while compromising neither correctness nor performance.
Year
DOI
Venue
2015
10.1007/s00450-014-0265-9
Computer Science - Research and Development
Keywords
Field
DocType
Significance, Energy, Unreliability, Near-threshold voltage, Fault tolerance
Computer science,Correctness,Real-time computing,Ranging,Frequency scaling,Distributed computing,Iterative method,Voltage,Parallel computing,Fault tolerance,Transistor,Energy consumption,Embedded system
Journal
Volume
Issue
ISSN
30
2
1865-2042
Citations 
PageRank 
References 
4
0.41
15
Authors
5
Name
Order
Citations
PageRank
Philipp Gschwandtner1587.15
Charalampos Chalios2122.55
Dimitrios S. Nikolopoulos31469128.40
Hans Vandierendonck462954.43
Thomas Fahringer52847254.09