Name
Abstract | ||
|---|---|---|
This study describes and evaluates an automated technique that exploits the potential of heterogeneous multi-core processor (HMP) systems when customised with respect to the number of cores and L1 cache memory sizes using a field programmable gate array fitted with LEON3 cores at its base. The authors evaluated the real energy consumption of the HMP system tuned for a set of 50 application codes using a data-mining tool for finding code similarities and selecting HMP configurations. The selected HMP system configuration requires a small cache configuration and consumes less energy when compared to a homogeneous system with the same number of cores and only with a very modest increase in execution time. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1049/iet-cdt.2014.0091 | IET Computers & Digital Techniques |
DocType | Volume | Issue |
Journal | 9 | 1 |
ISSN | Citations | PageRank |
1751-8601 | 2 | 0.38 |
References | Authors | |
6 | 5 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bruno de Abreu Silva | 1 | 10 | 2.58 |
| Lucas Albers Cuminato | 2 | 7 | 1.18 |
| Alexandre C. B. Delbem | 3 | 154 | 28.97 |
| P. C. Diniz | 4 | 2 | 0.38 |
| Vanderlei Bonato | 5 | 145 | 17.19 |