Name
Title | ||
|---|---|---|
A bitstream readback-based automatic functional test and diagnosis method for Xilinx FPGAs. |
Abstract | ||
|---|---|---|
In this paper, a novel bitstream readback-based test and diagnosis method including a bitstream parsing algorithm as well as a corresponding bitstream readback-based fault and diagnosis algorithm for Xilinx FPGAs is presented. The proposed method can be applied to both configurable logic block (CLB) and interconnect resource (IR) test. Further, the algorithm is suitable for all Virtex and Spartan series FPGAs. The issues such as fault coverage, diagnostic resolution, I/O numbers, as well as configuration numbers not addressed well by some previous works can be solved or partly relieved. The proposed method is evaluated by testing several Xilinx series FPGAs, and experimental results are provided. (C) 2014 Elsevier Ltd. All rights reserved. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1016/j.microrel.2014.03.017 | Microelectronics Reliability |
Keywords | Field | DocType |
FPGA,Readback,Bitstream,Test,Diagnosis | Spartan,Fault coverage,Computer science,Field-programmable gate array,Virtex,Logic block,Parsing,Interconnection,Bitstream,Embedded system | Journal |
Volume | Issue | ISSN |
54 | 8 | 0026-2714 |
Citations | PageRank | References |
4 | 0.46 | 11 |
Authors | ||
7 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Aiwu Ruan | 1 | 9 | 1.32 |
| Bairui Jie | 2 | 4 | 0.46 |
| Li Wan | 3 | 4 | 0.46 |
| Junhao Yang | 4 | 4 | 0.46 |
| Chuanyin Xiang | 5 | 4 | 0.46 |
| Zujian Zhu | 6 | 8 | 0.97 |
| Yu Wang | 7 | 8 | 1.31 |