Title
SET and noise fault tolerant circuit design techniques: Application to 7 nm FinFET.
Abstract
•We analyse several techniques to harden radiation effects and noise immunity.•We implement these techniques using 7nm FinFET technology.•A new design methodology is presented, called Strengthening.•This design style is technology’s independent.•Strengthening presents the best immunity in a noise environment.
Year
DOI
Venue
2014
10.1016/j.microrel.2013.12.018
Microelectronics Reliability
DocType
Volume
Issue
Journal
54
4
ISSN
Citations 
PageRank 
0026-2714
1
0.38
References 
Authors
12
5
Name
Order
Citations
PageRank
Antonio Calomarde184.42
E. Amat23010.36
Francesc Moll35514.87
Julio Vigara410.38
Antonio Rubio5185.41