Name
Abstract | ||
|---|---|---|
Multi-processor systems implemented in System-on-a-Chip technology (MPSoC) are emerging for processing embedded applications such as consumer electronics, mobile phones, computer graphics, and medical imaging, to name a few. Contrary to cluster and grid processing, their design and required compilation techniques are driven by multiple conflicting design objectives simultaneously such as power consumption, speed, monetary cost, and physical as well as memory size. Here, new specification techniques, special parallelization and mapping techniques are needed in order to embed computations optimally into the parallel architecture. Various architectural concepts ranging from fine-grain to coarse-grain parallel SoC architectures with focus on dynamic programmability or reconfigurability are currently emerging in academia and industry. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1007/11823285_124 | IJUC |
DocType | Volume | Issue |
Journal | 13 Suppl A | 3 |
ISSN | ISBN | Citations |
1042-3931 | 3-540-37783-2 | 0 |
PageRank | References | Authors |
0.34 | 0 | 5 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Jon Timmis | 1 | 1237 | 120.32 |
| Susan Stepney | 2 | 0 | 1.01 |
| Peter J. Bentley | 3 | 963 | 113.11 |
| Giuseppe Nicosia | 4 | 479 | 46.53 |
| vincenzo cutello | 5 | 553 | 57.63 |