Title
Scalable Design Of Microprogrammed Digital Fir Filter For Sensor Processing Subsystem
Abstract
In this letter, a novel scalable and modular design of direct form sequential finite impulse response (FIR) filter using microprogrammed control unit is proposed that can be efficiently realized in field programmable gate array (FPGA) or application specific integrated circuit (ASIC). The proposed design is suitable for sensor processing subsystem used in wireless sensor network (WSN) nodes. This is demonstrated by evaluating a sample 4-tap FIR filter on various FPGA platforms and ASIC technologies. The evaluation result shows good area/power efficiency and flexibility by using microprogrammed architecture for such applications.
Year
DOI
Venue
2014
10.1587/elex.11.20140474
IEICE ELECTRONICS EXPRESS
Keywords
Field
DocType
FIR filter, FPGA, microprogrammed control unit, sensor node design, scalable, wireless sensor network (WSN)
Electrical efficiency,Computer science,Field-programmable gate array,Application-specific integrated circuit,Control unit,Modular design,Finite impulse response,Wireless sensor network,Scalability,Embedded system
Journal
Volume
Issue
ISSN
11
14
1349-2543
Citations 
PageRank 
References 
0
0.34
1
Authors
4