Title
Virtual Ways: Low-Cost Coherence for Instruction Set Extensions with Architecturally Visible Storage
Abstract
Instruction set extensions (ISEs) improve the performance and energy consumption of application-specific processors. ISEs can use architecturally visible storage (AVS), localized compiler-controlled memories, to provide higher I/O bandwidth than reading data from the processor pipeline. AVS creates coherence and consistence problems with the data cache. Although a hardware coherence protocol could solve the problem, this approach is costly for a single-processor system. As a low-cost alternative, we introduce Virtual Ways, which ensures coherence through a reduced form of inclusion between the data cache and AVS. Virtual Ways achieve higher performance and lower energy consumption than using a hardware coherence protocol.
Year
DOI
Venue
2014
10.1145/2576877
TACO
Keywords
Field
DocType
memory coherence,design,experimentation,instruction set extension,architecturally visible storage,memory consistence,performance,virtual ways,real-time and embedded systems
Computer science,Instruction set,Instruction pipeline,Parallel computing,Coherence (physics),Real-time computing,Memory coherence,Bandwidth (signal processing),Data cache,Computer hardware,Energy consumption
Journal
Volume
Issue
ISSN
11
2
1544-3566
Citations 
PageRank 
References 
0
0.34
18
Authors
5
Name
Order
Citations
PageRank
Theo Kluter1655.08
Samuel Burri291.99
Philip Brisk378660.63
Edoardo Charbon438574.69
Paolo Ienne52246199.26