Title
SI-Studio, a layout generator of current mode circuits
Abstract
The paper presents automatic layout generation of analog current mode circuits.Chip area, power consumption and speed operation is controlled.An experimental chip was fabricated in CMOS technology.The chip was tested in the environment based on FPGA.Measurement results of realized filter pairs and filter banks are presented. This work is the answer to the so far unsolved problem of generation of integrated circuits topography for current mode circuits. Synthesis methods corresponding to already existing digital methods are proposed. Among others - the following has been shown: a digital adaptation of the row strategy for analog cell design, as well as performance control of the circuits with respect to chip area, power consumption and speed operation. The proposed algorithms are integrated with the already-existing tools for automatic layout generation of analog circuits with behavioral description at the beginning. At each stage of the synthesis process - an architecture description in the VHDL-AMS language was used, which so far has been not useful to synthesize. On the basis of the elaborated expert system, layouts of a filter pair and a filter bank were generated. The circuits were fabricated in TSMC 0.18 µ m CMOS technology and results of measurements are presented. The elaborated approach makes a contribution to the realization of current mode circuits with complexity not achievable up to now.
Year
DOI
Venue
2015
10.1016/j.eswa.2014.11.048
Expert Syst. Appl.
Keywords
Field
DocType
design automation
Data mining,Analogue electronics,Computer science,Software architecture description,Filter bank,Chip,Electronic engineering,CMOS,Electronic design automation,Electronic circuit,Integrated circuit
Journal
Volume
Issue
ISSN
42
6
0957-4174
Citations 
PageRank 
References 
2
0.37
10
Authors
11