Abstract | ||
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A novel hybrid co-design for implementing high-resolution reconstruction algorithms, for near real time implementation of remote sensing (RS) imagery, is addressed in this paper. In the proposed co-design scheme, the inverse square root and the matrix operations of the robust adaptive space filter algorithm are implemented as accelerators units in a Field Programmable Gate Array (FPGA) using piecewise polynomial approximations and systolic array (SA) techniques. Then, the FPGA based accelerator is integrated with an ARM processor in a HW/SW co-design paradigm that meets the (near) real time imaging systems requirements in spite of conventional computations. Finally, we report and discuss the results of the hybrid FPGA/ARM co-design implementation in a Xilinx Virtex-5 XC5VFX70TFFG1136 for reconstruction of real world RS images. |
Year | Venue | Keywords |
---|---|---|
2014 | PROGRESS IN PATTERN RECOGNITION IMAGE ANALYSIS, COMPUTER VISION, AND APPLICATIONS, CIARP 2014 | Remote sensing, systolic arrays, HW/SW co-design |
Field | DocType | Volume |
Fast inverse square root,ARM architecture,Computer science,Remote sensing,Real-time computing,Artificial intelligence,Piecewise,Computation,Computer vision,Co-design,Systolic array,Field-programmable gate array,Matrix multiplication | Conference | 8827 |
ISSN | Citations | PageRank |
0302-9743 | 1 | 0.35 |
References | Authors | |
2 | 6 |
Name | Order | Citations | PageRank |
---|---|---|---|
C. Góngora-Martín | 1 | 1 | 0.35 |
Alejandro Castillo Atoche | 2 | 13 | 5.25 |
J. Estrada Lopez | 3 | 3 | 2.45 |
J. Vazquez Castillo | 4 | 8 | 4.59 |
J. Ortegón-Aguilar | 5 | 1 | 1.03 |
Roberto Carrasco-Alvarez | 6 | 28 | 5.80 |