Name
Abstract | ||
|---|---|---|
Phase-Locked Loops (PLLs) are widely used as frequency synthesizers for clock signal generation. In aerospace environment, however, the performance of the PLL can be degraded due to the radiation exposure, which causes degradation of the parameters of its components. Thereby, this article presents a performance analysis of a clock generator PLL under TID effects. Output frequency, power consumption and control voltage variations are analyzed for different accumulated doses and compared with normal operating results, evidencing the performance degradation. PLL functional failures were also observed and discussed. The circuit was designed in a 0.35 mu m CMOS process and the simulations were performed using HSPICE simulator. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/LATW.2014.6841921 | LATW |
Keywords | DocType | ISSN |
CMOS integrated circuits,MIS devices,SPICE,avionics,frequency synthesizers,phase locked loops,radiation hardening (electronics),CMOS process,HSPICE simulator,PLL functional failure,TID effect,aerospace environment,clock generator PLL,clock signal generation,component parameter degradation,control voltage variation,frequency synthesizer,output frequency,performance analysis,performance degradation,phase locked loop,power consumption,radiation exposure,size 0.35 mum,total ionizing dose,PLL,ionizing radiation,simulation | Conference | 2373-0862 |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Alan Carlos Junior Rossetto | 1 | 0 | 0.34 |
| Gilson Inacio Wirth | 2 | 5 | 2.16 |
| Ricardo Vanni Dallasen | 3 | 0 | 0.34 |