Title | ||
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An 8-Bit 100ks/S Low Power Successive Approximation Register Adc For Biomedical Applications |
Abstract | ||
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This paper presents an 8-bit 100KS/s successive approximation register (SAR) analog-to-digital convertor (ADC) in SMIC 0.13 mu m 1P8M process for biomedical applications. This ADC is implemented with sub-circuits consuming no static power, thereby preserving the desired low power characteristic. According to the measured results, the SAR ADC has a signal-to-noise distortion ratio (SNDR) of 49.2 dB, and the spurious free dynamic range (SFDR) of 63 dB for a 9.37 kHz full-scale input sinusoidal wave at a 100 kHz sampling rate. The effective number of bit (ENOB) is 7.8 bits. The differential nonlinearity (DNL) is in the range of -0.15/+ 0.15 LSB whereas the integral nonlinearity (INL) is within -0.35/+0.23 LSB. The total power is 3.2uW and the figure of merit (FOM) is 143 fJ/conversion-step. |
Year | Venue | Field |
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2013 | 2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON) | Integral nonlinearity,Differential nonlinearity,Computer science,Sampling (signal processing),Spurious-free dynamic range,Figure of merit,Electronic engineering,Effective number of bits,Successive approximation ADC,Electrical engineering,Least significant bit |
DocType | ISSN | Citations |
Conference | 2162-7541 | 1 |
PageRank | References | Authors |
0.38 | 5 | 3 |
Name | Order | Citations | PageRank |
---|---|---|---|
Xiao Yan | 1 | 1 | 1.06 |
Lingzhi Fu | 2 | 13 | 2.68 |
Junyu Wang | 3 | 25 | 6.88 |