Name
Abstract | ||
|---|---|---|
This paper details on the design of GFSK (Gaussian frequency shit keying) transceiver with low-complexity high-performance & low power consumption, which is compliant with IEEE Std. 802.15.4g used in China. In this architecture of transceiver, the capability of suppression phase noises is improved by employing fractional-N divider synthesizer with the 3rd-order sigma delta modulator, and the power consumption is also saved for using a discrete-time quadricorrelator with simple stucture in demodulator. Meanwile, system simulation results show, corresponding to other transceivers, this architecture is optimized and presents a good tolerance for carrier frequency offset within 50KHz. |
Year | Venue | Field |
|---|---|---|
2013 | 2013 IEEE 10TH INTERNATIONAL CONFERENCE ON ASIC (ASICON) | Demodulation,Transceiver,Computer science,Carrier frequency offset,Keying,Electronic engineering,Delta-sigma modulation,Gaussian,Electrical engineering,Power consumption |
DocType | ISSN | Citations |
Conference | 2162-7541 | 0 |
PageRank | References | Authors |
0.34 | 4 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Maoqiang Duan | 1 | 0 | 0.34 |
| Xiaoli Huang | 2 | 0 | 0.34 |
| Zhijia Yang | 3 | 13 | 4.62 |