Paper Info
Title
Instruction Cache in Hard Real-Time Systems: Modeling and Integration in Scheduling Analysis Tools with AADL
Abstract
Cache prediction for real-time systems in a preemptive scheduling context is still an open issue despite its practical importance. In this paper, we propose a modeling approach for taking into account the cache memory in realtime scheduling analysis. The goal is to have a simple but practical implementation to handle the cache memory with a real-time scheduling analyzer. The proposed contribution consists of three main parts: (1) modeling the targeted system with the Architecture Analysis and Design Language (AADL), (2) applying the cache analysis methods in a real time scheduling analysis tool and (3) performing scheduling simulation to access schedulability. For such a purpose, we present an extension of both the scheduling analysis tool Cheddar and of the AADL modeling language in order to integrate the cache modeling and analysis methodology we proposed. Experiments are presented to illustrate our propositions. They provide results on analysis that show examples of the timing impact of task preemption as well as the increase in overall responses time of the task set. This impact is important and the developed tool provides means to precisely assess it.
Year
DOI
Venue
2014
10.1109/EUC.2014.24
EUC
Keywords
DocType
Citations 
realtime scheduling analysis,scheduling,aadl modeling language,scheduling simulation,architecture analysis and design language,cache storage,cache analysis methods,task preemption,hard real-time systems,instruction cache prediction,preemptive scheduling context,real-time systems
Conference
0
PageRank 
References 
Authors
0.34
0
4
Name
Order
Citations
PageRank
Hai Nam Tran142.50
Frank Singhoff29317.70
Stephane Rubini35712.08
Jalil Boukhobza410722.94