Title | ||
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A capacitive-coupling technique with phase noise and phase error reduction for multi-phase clock generation |
Abstract | ||
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This paper presents a capacitive-coupling technique for multi-phase oscillators. The proposed capacitive coupling techniques can improve the phase noise performance while maintain good phase accuracy over wide frequency range for multi-phase oscillators. A prototype two-phase VCO is analyzed using injection-locking theory and implemented to demonstrate the effectiveness of the capacitive-coupling technique for low-power and low-noise multiple phase clock generation. The 4.3-5.3 GHz two-phase VCO prototype was implemented in a 130 nm CMOS technology and achieved a measured phase noise of -120 to -124.04 dBc /Hz @ 1 MHz offset and a measured phase error of 0.23-0.91° across the 1 GHz tuning range. |
Year | DOI | Venue |
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2014 | 10.1109/CICC.2014.6946098 | CICC |
Keywords | DocType | Citations |
field effect MMIC,CMOS integrated circuits,phase error reduction,multiphase oscillators,voltage-controlled oscillators,capacitive-coupling technique,phase accuracy,prototype two-phase VCO,size 130 nm,microwave oscillators,CMOS technology,multiphase clock generation,clocks,injection-locking theory,phase noise,frequency 4.3 GHz to 5.3 GHz | Conference | 0 |
PageRank | References | Authors |
0.34 | 0 | 2 |
Name | Order | Citations | PageRank |
---|---|---|---|
Feng Zhao | 1 | 16 | 2.64 |
Fa Foster Dai | 2 | 143 | 29.84 |