Abstract | ||
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This paper presents a 65-nm CMOS, 1-V, 1.37-pJ/bit optical receiver with embedded equalizer, enabling adaptability to overcome channel losses and component variations. The digitally-controlled continuous-time linear equalizer (CTLE) consists of three cascaded tunable peaking stages offering 16-dB of adjustable low-frequency gain. Optical measurement results with a 30-Gb/s photodetector (PD) show that the receiver achieves 10-12 BER at 30 Gb/s for a 215-1 PRBS input with a -5.6-dBm input sensitivity. Using a lower bandwidth 14-Gb/s PD, the receiver can still reach 30 Gb/s at 10-12 BER with only a 0.6-dB degradation in input sensitivity. These measurement results demonstrate the effectiveness of the proposed receiver and the programmable cascaded CTLE. |
Year | DOI | Venue |
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2014 | 10.1109/ESSCIRC.2014.6942038 | ESSCIRC |
Keywords | Field | DocType |
cmos integrated circuits,digitally-controlled continuous-time linear equalizer,cmos optical receiver,limiting amplifier,size 65 nm,digitally-tunable cascaded equalization,optical receiver,bit rate 30 gbit/s,channel loss,embedded equalizer,photodetectors,power 41 mw,voltage 1 v,optical receivers,transimpedance amplifier,cascaded continuous-time linear equalizer,programmable cascaded ctle,low-frequency gain,equalisers,optical measurement,component variations,photodetector | Equalizer,Equalization (audio),Computer science,Communication channel,Pseudorandom binary sequence,Electronic engineering,CMOS,Photodetector,Transimpedance amplifier,Bandwidth (signal processing) | Conference |
ISSN | Citations | PageRank |
1930-8833 | 2 | 0.45 |
References | Authors | |
6 | 8 |
Name | Order | Citations | PageRank |
---|---|---|---|
Quan Pan | 1 | 521 | 40.66 |
Yipeng Wang | 2 | 33 | 4.17 |
Zhengxiong Hou | 3 | 2 | 0.45 |
Li Sun | 4 | 2 | 0.45 |
Liang Wu | 5 | 35 | 5.96 |
Wing-Hung Ki | 6 | 1144 | 197.75 |
Patrick Chiang | 7 | 2 | 0.45 |
C. Patrick Yue | 8 | 148 | 41.70 |