Name
Abstract | ||
|---|---|---|
The growing gap between microprocessor speed and DRAM speed is a major problem that computer designers are facing. In order to narrow the gap, it is necessary to improve DRAM's speed and throughput. Moreover, on multi-core platforms, DRAM memory shared by all cores usually suffers from the memory contention and interference problem, which can cause serious performance degradation and unfairness of the overall system. To address these problems, this paper proposes techniques to take advantage of partitioning cores, threads and memory banks into group to form pseudoNUMA architecture which each thread runs on one core group using unique memory bank group to reduce interference among different groups. We implement pseudoNUMA in both 4-core and 8-core platforms. Experimental results show pseudoNUMA reduces 9.8% and 11.4% row buffer miss rate than buddy algorithm on average and improves 15.3% and 16.5% fairness on average in 4-core and 8-core respectively. Moreover, pseudoNUMA saves 6.1% of the energy consumption of memory system. |
Year | Venue | Keywords |
|---|---|---|
2014 | SpringSim (HPS) | design,memory contention,experimentation,fairness,parallel architectures,main memory,energy,measurement,memory interference,performance |
Field | DocType | Citations |
Memory bank,Registered memory,Interleaved memory,Uniform memory access,Computer science,Parallel computing,Cache-only memory architecture,Distributed memory,Memory management,Flat memory model | Conference | 0 |
PageRank | References | Authors |
0.34 | 25 | 6 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Gangyong Jia | 1 | 150 | 24.20 |
| Xi Li | 2 | 22 | 12.44 |
| Youwei Yuan | 3 | 0 | 1.01 |
| Jian Wan | 4 | 483 | 56.15 |
| Cong-feng Jiang | 5 | 124 | 22.08 |
| Dong Dai | 6 | 11 | 3.70 |