Name
Abstract | ||
|---|---|---|
This work presents a hardware-software co-design approach of an OpenFlow switch using a state-of-the-art heterogeneous System-on-chip (SoC) platform. Specifically, we implement the OpenFlow switch on a Xilinx Zynq ZC706 board. The Xilinx Zynq SoC family provides a tight coupling of field programmable gate array (FPGA) fabric and ARM processor cores, making it an attractive on-chip implementation platform for SDN switches. High-performance, yet highly-programmable, data plane processing can reside in the programmable logic (PL), while complex control software can reside in ARM processor. Our proposed architecture scales across a range of possible packet throughput rates and a range of possible flow table sizes. Post-place-and-route results show that our design targeted at Zynq can achieve a total 88 Gbps throughput for a 1K flow table which supports dynamic updates. Correct operation has been demonstrated using a ZC706 board. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1145/2620728.2620767 | HotSDN |
Keywords | Field | DocType |
heterogeneous soc,openflow switch,packet-switching networks,software defined networking | ARM architecture,Forwarding plane,Computer science,Field-programmable gate array,OpenFlow,Throughput,Software-defined networking,Programmable logic device,Embedded system,Scalability | Conference |
Citations | PageRank | References |
1 | 0.42 | 3 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Shijie Zhou | 1 | 195 | 35.04 |
| Weirong Jiang | 2 | 521 | 32.11 |
| Viktor K. Prasanna | 3 | 7211 | 762.74 |