Name
Title | ||
|---|---|---|
13.4 A 6.3mW BLE transceiver embedded RX image-rejection filter and TX harmonic-suppression filter reusing on-chip matching network |
Abstract | ||
|---|---|---|
In previous research, solutions to the requirements for BLE have been widely discussed such as using the sliding IF (SIF) architecture in the RX [1,2] and a Class-D amplifier [2] with HD2 calibration [4] in the TX to achieve lower current consumption. The SIF architecture, however, involves RF image blocking violation without exception rule or the use of additional off-chip filters. In the TX, meanwhile, the calibration incurs a weakness in terms of the offset issue. Moreover, there is no approach to achieve "zero" external components for the RF port. In this paper, a BLE transceiver, with a reconfigurable filter, embedded into an on-chip matching network without any external components, is presented. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/ISSCC.2015.7063015 | ISSCC |
Keywords | Field | DocType |
phase locked loops,system on chip,calibration,transceivers,radio frequency,matched filters | Image response,System on a chip,Transceiver,Computer science,Electronic engineering,Radio frequency,Matched filter,Electrical engineering,Wireless network interface controller,Bluetooth,Amplifier | Conference |
Citations | PageRank | References |
14 | 1.40 | 3 |
Authors | ||
10 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Tomohiro Sano | 1 | 80 | 8.11 |
| Masakazu Mizokami | 2 | 14 | 2.42 |
| Hiroaki Matsui | 3 | 14 | 1.74 |
| Keisuke Ueda | 4 | 14 | 1.40 |
| Kenichi Shibata | 5 | 14 | 3.77 |
| kenji toyota | 6 | 14 | 1.74 |
| Tatsuhito Saitou | 7 | 14 | 1.40 |
| Hisayasu Sato | 8 | 14 | 1.74 |
| Koichi Yahagi | 9 | 14 | 1.40 |
| Yoshihiro Hayashi | 10 | 50 | 8.14 |