Paper Info
Title
Author's retrospective for: improving the performance of speculatively parallel applications on the hydra CMP
Abstract
Our 1999 paper described how to use hardware with thread-level speculation (TLS) support to effectively parallelize a number of serial application benchmarks with minimal programmer intervention required. The ability of TLS hardware to allow programmers to parallelize code almost arbitrarily and then performance tune afterwards, based on feedback supplied by the TLS system, provided significant improvements to programmer productivity and made parallel programming much less error-prone. Since this paper appeared, we investigated other hardware variations that could provide similar benefits in terms of programmer productivity, such as ones based on an extension of transactional memory. Unfortunately, these concepts have not been implemented on any real systems. As a result, there is still an opportunity to implement schemes like the ones that we described in this paper in order to ease parallel programming in future systems dramatically.
Year
DOI
Venue
2014
10.1145/2591635.2591658
ICS 25th Anniversary
Keywords
Field
DocType
chip multiprocessor,parallel programming,parallel architectures,transactional memory,retrospective,thread-level speculation
Speculation,Programmer,Programming language,Computer science,Parallel computing,Transactional memory,Real-time computing,Real systems,Operating system
Conference
Citations 
PageRank 
References 
0
0.34
2
Authors
3
Name
Order
Citations
PageRank
Kunle Olukotun14532373.50
Lance Hammond252066.61
Mark Willey3384.49