Paper Info
Title
Mosaic: Exploiting the spatial locality of process variation to reduce refresh energy in on-chip eDRAM modules
Abstract
EDRAM cells require periodic refresh, which ends up consuming substantial energy for large last-level caches. In practice, it is well known that different eDRAM cells can exhibit very different charge-retention properties. Unfortunately, current systems pessimistically assume worst-case retention times, and end up refreshing all the cells at a conservatively-high rate. In this paper, we propose an alternative approach. We use known facts about the factors that determine the retention properties of cells to build a new model of eDRAM retention times. The model is called Mosaic. The model shows that the retention times of cells in large eDRAM modules exhibit spatial correlation. Therefore, we logically divide the eDRAM module into regions or tiles, profile the retention properties of each tile, and program their refresh requirements in small counters in the cache controller. With this architecture, also called Mosaic, we refresh each tile at a different rate. The result is a 20x reduction in the number of refreshes in large eDRAM modules - practically eliminating refresh as a source of energy consumption.
Year
DOI
Venue
2014
10.1109/HPCA.2014.6835978
HPCA
Keywords
Field
DocType
refresh requirements,edram retention times,power aware computing,cache storage,on-chip edram modules,edram cells,mosaic,energy conservation,cache controller,dram chips,charge-retention properties,energy consumption,refresh energy reduction,process variation spatial locality,spatial correlation,embedded dram,capacitors,transistors,irrigation
Locality,Spatial correlation,Capacitor,Computer science,Parallel computing,Real-time computing,Process variation,eDRAM,Cache controller,Transistor,Computer hardware,Energy consumption
Conference
ISSN
Citations 
PageRank 
1530-0897
28
0.98
References 
Authors
18
3
Name
Order
Citations
PageRank
Aditya Agrawal154634.80
Amin Ansari236115.88
Josep Torrellas33838262.89