Paper Info
Title
Priority-based cache allocation in throughput processors
Abstract
GPUs employ massive multithreading and fast context switching to provide high throughput and hide memory latency. Multithreading can Increase contention for various system resources, however, that may result In suboptimal utilization of shared resources. Previous research has proposed variants of throttling thread-level parallelism to reduce cache contention and improve performance. Throttling approaches can, however, lead to under-utilizing thread contexts, on-chip interconnect, and off-chip memory bandwidth. This paper proposes to tightly couple the thread scheduling mechanism with the cache management algorithms such that GPU cache pollution is minimized while off-chip memory throughput is enhanced. We propose priority-based cache allocation (PCAL) that provides preferential cache capacity to a subset of high-priority threads while simultaneously allowing lower priority threads to execute without contending for the cache. By tuning thread-level parallelism while both optimizing caching efficiency as well as other shared resource usage, PCAL builds upon previous thread throttling approaches, improving overall performance by an average 17% with maximum 51%.
Year
DOI
Venue
2015
10.1109/HPCA.2015.7056024
HPCA
Keywords
DocType
ISSN
on-chip interconnect,cache storage,context switching,gpu cache pollution,parallel architectures,off-chip memory bandwidth,graphics processing units,multi-threading,thread scheduling mechanism,multithreading,throttling thread-level parallelism,cache management algorithm,priority-based cache allocation,throughput processor
Conference
1530-0897
Citations 
PageRank 
References 
35
0.80
13
Authors
8
Name
Order
Citations
PageRank
Dong Li147567.20
Minsoo Rhu232216.80
Daniel R. Johnson330414.54
Mike O'Connor41555.03
Mattan Erez5154388.21
Doug Burger66160491.08
Donald S. Fussell7351.14
Stephen W. Redder8350.80