Name
Abstract | ||
|---|---|---|
Graphics processing units (GPUs) have specialized throughput-oriented memory systems optimized for streaming writes with scratchpad memories to capture locality explicitly. Expanding the utility of GPUs beyond graphics encourages designs that simplify programming (e.g., using caches instead of scratchpads) and better support irregular applications with finer-grain synchronization. Our hypothesis is that, like CPUs, GPUs will benefit from caches and coherence, but that CPU-style “read for ownership” (RFO) coherence is inappropriate to maintain support for regular streaming workloads. This paper proposes QuickRelease (QR), which improves on conventional GPU memory systems in two ways. First, QR uses a FIFO to enforce the partial order of writes so that synchronization operations can complete without frequent cache flushes. Thus, non-synchronizing threads in QR can re-use cached data even when other threads are performing synchronization. Second, QR partitions the resources required by reads and writes to reduce the penalty of writes on read performance. Simulation results across a wide variety of general-purpose GPU workloads show that QR achieves a 7% average performance improvement compared to a conventional GPU memory system. Furthermore, for emerging workloads with finer-grain synchronization, QR achieves up to 42% performance improvement compared to a conventional GPU memory system without the scalability challenges of RFO coherence. To this end, QR provides a throughput-oriented solution to provide fine-grain synchronization on GPUs. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/HPCA.2014.6835930 | High Performance Computer Architecture |
Keywords | Field | DocType |
graphics processing units,storage management,GPU memory system,QuickRelease,finer-grain synchronization,graphics processing unit,scratchpad memory,throughput-oriented memory system | Kernel (linear algebra),Graphics,Locality,Synchronization,Computer science,Instruction set,Parallel computing,Real-time computing,Throughput,CUDA Pinned memory,Release consistency | Conference |
ISSN | Citations | PageRank |
1530-0897 | 28 | 0.94 |
References | Authors | |
13 | 8 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Blake A. Hechtman | 1 | 92 | 3.94 |
| Shuai Che | 2 | 1743 | 82.36 |
| Derek R. Hower | 3 | 1066 | 34.18 |
| Yingying Tian | 4 | 28 | 0.94 |
| Bradford Beckmann | 5 | 2390 | 101.06 |
| Mark D. Hill | 6 | 7371 | 582.90 |
| Steven K. Reinhardt | 7 | 3885 | 226.69 |
| David A. Wood | 8 | 6058 | 617.11 |