Name
Abstract | ||
|---|---|---|
In recent years, smart devices are transitioning from single core processors to multicore processors to satisfy the growing demands of higher performance and lower power consumption. However, power consumption of multicore processors is increasing, as usage of smart devices become more intense. This situation is one of the most fundamental and important obstacle that the mobile device industries face, to extend the battery life of smart devices. This paper evaluates the power reduction control by the OSCAR Automatic Parallelizing Compiler on an Android platform with the newly developed precise power measurement environment on the ODROID-X2, a development platform with the Samsung Exynos4412 Prime, which consists of 4 ARM Cortex-A9 cores. The OSCAR Compiler enables automatic exploitation of multigrain parallelism within a sequential program, and automatically generates a parallelized code with the OSCAR Multi-Platform API power reduction directives for the purpose of DVFS (Dynamic Voltage and Frequency Scaling), clock gating, and power gating. The paper also introduces a newly developed micro second order pseudo clock gating method to reduce power consumption using WFI (Wait For Interrupt). By inserting GPIO (General Purpose Input Output) control functions into programs, signals appear on the power waveform indicating the point of where the GPIO control was inserted and provides a precise power measurement of the specified program area. The results of the power evaluation for real-time Mpeg2 Decoder show 86.7% power reduction, namely from 2.79[W] to 0.37[W] and for real-time Optical Flow show 86.5% power reduction, namely from 2.23[W] to 0.36[W] on 3 core execution. |
Year | DOI | Venue |
|---|---|---|
2013 | 10.1007/978-3-319-09967-5_9 | Lecture Notes in Computer Science |
Keywords | Field | DocType |
Smart device,Automatic parallelization,API,Power control,Power reduction,Multicore processor,Android,WFI | Interrupt,Clock gating,Single-core,Computer science,Power control,Parallel computing,Compiler,Power gating,Frequency scaling,Multi-core processor,Embedded system | Conference |
Volume | ISSN | Citations |
8664 | 0302-9743 | 2 |
PageRank | References | Authors |
0.38 | 15 | 9 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Hideo Yamamoto | 1 | 3 | 0.74 |
| Tomohiro Hirano | 2 | 3 | 1.11 |
| Kohei Muto | 3 | 3 | 0.77 |
| Hiroki Mikami | 4 | 28 | 5.48 |
| Takashi Goto | 5 | 3 | 0.77 |
| Dominic Hillenbrand | 6 | 10 | 3.98 |
| Moriyuki Takamura | 7 | 10 | 3.32 |
| Keiji Kimura | 8 | 120 | 23.20 |
| Hironori Kasahara | 9 | 285 | 44.35 |