Name
Title | ||
|---|---|---|
Recent advances in SAT-based ATPG: Non-standard fault models, multi constraints and optimization |
Abstract | ||
|---|---|---|
It is well-known that in principle automatic test pattern generation (ATPG) can be solved by transforming the circuit and the fault considered into a Boolean satisfiability (SAT) instance and then calling a so-called SAT solver to compute a test. More recently, the potential of SAT-based ATPG has been significantly extended. In this paper, we first provide introductory knowledge on SAT-based ATPG and then report on latest developments enabling applications far beyond classical ATPG. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/DTIS.2014.6850674 | DTIS |
Keywords | Field | DocType |
optimisation,logic circuits,sat-based atpg,boolean satisfiability instance,principle automatic test pattern generation,automatic test pattern generation,computability,principle atpg,nonstandard fault model,boolean sat instance,sat solver,logic testing,computational modeling,optimization,logic gates | Automatic test pattern generation,Boolean circuit,Computer science,Boolean satisfiability problem,Theoretical computer science | Conference |
Citations | PageRank | References |
2 | 0.36 | 49 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Bernd Becker | 1 | 855 | 73.74 |
| Rolf Drechsler | 2 | 3707 | 351.36 |
| S. Eggersgluss | 3 | 61 | 10.88 |
| Matthias Sauer | 4 | 195 | 20.02 |