Paper Info
Title
Compiler Assisted Instruction Relocation for Performance Improvement of Cache Hit Rate and System Reliability
Abstract
Because the spatial and temporal locality of program codes, compiler could use heuristics and profile guided prediction to relocate the output of program codes to reduce the cache confliction. In this paper, for improving the average accessing time of memory subsystem by raising the cache hit rate, hybrid compiler assisted prediction and relocation techniques are proposed. Different with the traditional scheme that provide the fixed heuristics predication for various kinds of programs, the more elaborate scheme with command line direction and the markov based heuristics algorithm with different parameters is adopted for program prediction in this paper. As a result, the sequential instructions layout based on the executing probability and frequency ensures the benefit to cache hit rate and the fetch unit of processor, meanwhile in favour of the system reliability.
Year
DOI
Venue
2014
10.1109/SERE-C.2014.46
SERE (Companion)
Keywords
Field
DocType
command line direction,sequential instructions layout,cache confliction reduction,profile guided prediction,software reliability,cache storage,markov based heuristics algorithm,compiler assisted instruction relocation,cache,markov processes,program codes temporal locality,processor fetch unit,hybrid compiler assisted prediction,predication,system reliability,compiler assisted, cache, hit rate, relocation, predication,hit rate,compiler assisted,fixed heuristics predication,cache hit rate performance improvement,program codes spatial locality,relocation,program compilers
Hit rate,Locality of reference,Cache pollution,Cache,Computer science,Parallel computing,Cache algorithms,Compiler,Heuristics,Cache coloring
Conference
Citations 
PageRank 
References 
1
0.43
4
Authors
5
Name
Order
Citations
PageRank
Benbin Chen111.11
Lin Li281.91
Yiyang Li310.43
Hongyin Luo431.81
Donghui Guo510721.93