Name
Abstract | ||
|---|---|---|
Formal verification is the task of proving that a property holds for a model of a design. This paper examines the idea of a Neural Network-based algorithm used to find the set of states that makes a specificafion valid. The paper addresses a singular approach for those doing theoretical research for the verification of soft programs, and, for hardware designers. The approach of the application of the Artificial Neural Network is not new, but it becomes interesting if one can improve the truth-building efficiency by using some known artifices. Topics described include Integer Linear Programming, Propositional Logic, Model Checking, Satisfiability problems (SAT) and Artificial Neural Networks (ANN). |
Year | DOI | Venue |
|---|---|---|
2003 | 10.1109/ICECS.2003.1301761 | ICECS 2003: PROCEEDINGS OF THE 2003 10TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-3 |
Keywords | DocType | Citations |
computability,model checking,neural nets,formal verification,neural network,artificial neural network,software verification,linear programming,propositional logic,boolean functions,satisfiability,integer programming | Conference | 1 |
PageRank | References | Authors |
0.37 | 4 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mohamed Larbi Rebaiaia | 1 | 11 | 4.04 |
| Jihad Mohamad Jaam | 2 | 73 | 7.14 |
| Ahmad Hasnah | 3 | 18 | 3.82 |