Name
Abstract | ||
|---|---|---|
The design of a digital baseband for a low power wireless receiver in 65 nm CMOS is presented. It consists of decimation filtering, matched filters for data detection, and preamble based synchronization. The circuit was designed using low threshold devices in both low power (LP-LVT) and general-purpose (GP-LVT) domains. The fabricated circuits were functionally verified, and silicon measurements show a minimum energy dissipation of around 454 pJ and 708 pJ per output bit at a rate of 500kbit/s for the LP-LVT and GP-LVT implementations, respectively. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/ICECS.2014.7049946 | Electronics, Circuits and Systems |
Keywords | Field | DocType |
CMOS integrated circuits,frequency shift keying,integrated circuit design,low-power electronics,matched filters,radio receivers,GP-LVT,LP-LVT,circuit design,data detection,decimation filtering,digital baseband,energy dissipation,general-purpose-LVT,low power FSK-based receiver,low power wireless receiver,low threshold devices,matched filters,preamble-based synchronization,silicon measurements,size 65 nm | Baseband,Decimation,Wireless,Computer science,Frequency-shift keying,Filter (signal processing),Electronic engineering,CMOS,Matched filter,Electronic circuit | Conference |
Citations | PageRank | References |
0 | 0.34 | 0 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| S. M. Yasser Sherazi | 1 | 12 | 3.29 |
| Henrik Sjöland | 2 | 77 | 21.81 |
| Peter Nilsson | 3 | 59 | 10.04 |