Paper Info
Title
Compact modeling of homojunction tunnel FETs
Abstract
Aggressive scaling of the supply voltage reduces the energy needed for switching of standard CMOS devices. However, advanced CMOS technologies are facing two main problems that consequently lead to higher power consumption: the complexity of a further supply voltage reduction, and the rising leakage currents that directly affect the switching ratio between the ON and OFF states. At present, the available field-effect transistors (FETs) in the CMOS integrated circuits require at room temperature at least 60 mV of gate voltage to increase the current by one order of magnitude. Recent publications have highlighted the need for alternative devices providing better ON-OFF switching performance. Tunneling FETs are very promising devices to respond to the demanding requirements of future scaled silicon technology nodes. The paper reviews recent compact modeling of homojunction TFET devices.
Year
DOI
Venue
2014
10.1109/MIXDES.2014.6872152
MIXDES
Keywords
Field
DocType
mosfet,leakage currents,semiconductor device models,tunnel transistors,cmos integrated circuits,on-off switching performance,energy reduction,field-effect transistors,homojunction tunnel fet compact modeling,power consumption,scaled silicon technology,standard cmos devices,supply voltage aggressive scaling,supply voltage reduction,switching ratio,temperature 293 k to 298 k,compact modelng,tunell fet,verlog-a,tunneling,logic gates,field effect transistors
Quantum tunnelling,Voltage reduction,Leakage (electronics),Computer science,Semiconductor device modeling,Voltage,Electronic engineering,CMOS,Transistor,Homojunction,Electrical engineering
Conference
Citations 
PageRank 
References 
0
0.34
3
Authors
7
Name
Order
Citations
PageRank
arnab biswas100.34
nilay dagtekin200.34
cem alper300.34
luca de michielis400.34
Antonios Bazigos563.44
Wladek Grabinski621.59
Adrian M. Ionescu79320.31