Paper Info
Title
2.8 A pulse-position-modulation phase-noise-reduction technique for a 2-to-16GHz injection-locked ring oscillator in 20nm CMOS
Abstract
High-speed transceivers embedded inside FPGAs require software-programmable clocking circuits to cover a wide range of data rates across different channels [1]. These transceivers use high-frequency PLLs with LC oscillators to satisfy stringent jitter requirements at increasing data rates. However, the large area of these oscillators limits the number of independent LC-based clocking sources and reduces the flexibility offered by the FPGA. A ring-based PLL occupies smaller area but produces higher jitter. With injection-locking (IL) techniques [2-3], ring-based oscillators achieve comparable performance with their LC counterparts [4-5] at frequencies below 10GHz. Moreover, addition of a PLL to an injection-locked VCO (IL-PLL) provides injection-timing calibration and frequency tracking against PVT [3,5]. Nevertheless, applying injection-locking techniques to high-speed ring oscillators in deep submicron CMOS processes, with high flicker-noise corner frequencies at tens of MHz, poses a design challenge for low-jitter operation. Shown in Fig. 2.8.1, injection locking can be modeled as a single-pole feedback system that achieves 20dB/dec of in-band noise shaping against intrinsic VCO phase noise over a wide bandwidth [6]. As a consequence, this technique suppresses the 1/f2 noise of the VCO but not its 1/f3 noise. Note that the conventional IL-PLL is capable of shaping the VCO in-band noise at 40dB/dec [6]; however, its noise shaping is limited by the narrow PLL bandwidth due to significant attenuation of the loop gain by injection locking. To achieve wideband 2nd-order noise shaping in 20nm ring oscillators, we present a circuit technique that applies pulse-position-modulated (PPM) injection through feedback control.
Year
DOI
Venue
2014
10.1109/ISSCC.2014.6757334
Solid-State Circuits Conference Digest of Technical Papers
Keywords
DocType
ISSN
1/f noise,cmos integrated circuits,flicker noise,injection locked oscillators,microwave oscillators,phase locked loops,phase noise,pulse position modulation,voltage-controlled oscillators,1/f2 noise,fpga,lc oscillator,vco phase noise,deep submicron cmos process,feedback control,frequency 2 ghz to 16 ghz,frequency tracking,high-frequency pll,high-speed ring oscillator,high-speed transceiver,injection-locked vco,injection-locked ring oscillator,injection-locking technique,injection-timing calibration,phase-noise-reduction technique,pulse-position-modulation,ring-based pll,single-pole feedback system,size 20 nm,software-programmable clocking circuit
Conference
0193-6530
Citations 
PageRank 
References 
11
1.01
4
Authors
8
Name
Order
Citations
PageRank
Jun-Chau Chien113019.66
Parag Upadhyaya29616.75
howard jung3111.01
Stanley Chen4376.64
wayne fang5111.01
Ali M. Niknejad6942148.48
Jafar Savoj715427.84
Ken Chang813323.31