Paper Info
Title
Implementation of 8B/10B encoder-decoder for Gigabit Ethernet Frame
Abstract
This paper describe a byte oriented transmission code and its hardware implementation with elaborating a method for implementation of the DC-balanced 8B/10B coding using a very fast FPGA from Spartan family. This code is particularly well suited for high-speed local area networks. This technique can be used by other high speed buses such as PCI Express, IEEE 1394b, Serial ATA, SAS, Fiber channel, SSA. Gigabit Ethernet INFIBAND, XAUI, Serial Rapid IO, uses the same coding module. Using the Look-up Table and memory with fast technique made this design efficient to be implemented. A very simple implementation of the code has been accomplished by the partitioning of the coder into 5B/6B and 3B/4B subordinates coders. For increasing its performance more RTL logic is required.
Year
DOI
Venue
2014
10.1109/WOCN.2014.6923049
Wireless and Optical Communications Networks
Keywords
Field
DocType
encoding,local area networks,8B/10B encoder decoder,DC-balanced 8B/10B coding,FPGA,Fiber channel,IEEE 1394b,Look-up Table,PCI Express,Rapid IO,SAS,Serial ATA,Spartan family,XAUI,byte oriented transmission code,coding module,gigabit Ethernet frame,hardware implementation,local area networks,8B/10Bcoding,DC-balanced,Disparity
Byte,Computer science,Field-programmable gate array,Computer network,Fibre Channel,Gigabit Ethernet,Decoding methods,PCI Express,XAUI,Serial ATA,Embedded system
Conference
ISSN
Citations 
PageRank 
1811-3923
2
0.47
References 
Authors
2
3
Name
Order
Citations
PageRank
Shivani Yadav120.47
Sujata Pandey220.47
Ashutosh Kumar Gupta3114.12