Title
Fast accurate evaluation of register lifetime and criticality in a pipelined microprocessor
Abstract
The probability of application failures due to soft errors in microprocessors is directly related to the lifetime of data stored in the internal registers. For high performance processors, the accurate analysis of this lifetime is difficult due to the various micro-architecture features, including pipeline registers and fast-forwarding connections managing data dependencies. Using fault injections to evaluate the robustness of a given application program is very time-consuming, even when emulation is used. In consequence, the comparison of several program implementations is often not affordable. We propose a new approach for the evaluation of lifetimes in all the registers of a pipelined processor, ensuring accurate results while reducing drastically the time required for evaluation, thus enabling more software optimizations. In addition, the most critical registers can be quickly identified.
Year
DOI
Venue
2014
10.1109/VLSI-SoC.2014.7004158
Very Large Scale Integration
Keywords
DocType
Citations 
fault tolerant computing,multiprocessing systems,pipeline processing,application failures,data dependencies,fast-forwarding connections,fault injections,internal registers,micro-architecture features,pipelined microprocessor,register criticality,register lifetime,soft errors,software optimizations,dependability soft errors,lifetime,microprocessor,pipeline,register criticality
Conference
3
PageRank 
References 
Authors
0.47
6
4
Name
Order
Citations
PageRank
Chibani, K.130.47
Mohamed Ben Jrad261.93
Michele Portolan3115.50
Régis Leveugle435444.83