Name
Abstract | ||
|---|---|---|
The increasing amount of images and videos accesses by social networks users is demanding devices with more efficiency on image processing. On the other hand, such devices cannot be expensive and must have reduced power consumption due to the need for mobility. To cope with this scenario, this paper proposes the improvement of an image processing application by implementing some computation intensive functions in hardware and the others in software. The platform comprises a ATOM processor and FPGAs. After a profiling application, the time critical parts of image processing application are implemented as hardware modules in FPGAs and, thereby, speeding up the processing power of the platform. As case study we present the hardware-software implementation of the RGB converter and thres holding algorithm, an important function of image segmentation. The function for converting images from RGB format to YCrCB format is very time consuming. The implementation of this function in hardware results in speedup of about 13% up to 99% in this image processing approach, with an average error of 0.000410 for the Y component, 0.000293 for the Cr component and 0.0002333 for the Cb component. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/SBESC.2014.24 | SBESC |
Field | DocType | ISSN |
Computer science,Field-programmable gate array,Image processing,Image segmentation,Software,Hardware acceleration,Thresholding,Digital image processing,Computer hardware,Embedded system,Speedup | Conference | 2324-7886 |
Citations | PageRank | References |
2 | 0.50 | 5 |
Authors | ||
6 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Rafael M. Macieira | 1 | 5 | 1.65 |
| Lucas F. S. Cambuim | 2 | 7 | 1.66 |
| Luiz L. Souza | 3 | 2 | 0.50 |
| Luiz A. Oliveira | 4 | 6 | 0.96 |
| Marcus F. R. Rios | 5 | 2 | 0.50 |
| Edna Barros | 6 | 21 | 4.99 |