Name
Title | ||
|---|---|---|
Design of a Quaternary Single-Ended Current-Mode Circuit for an Energy-Efficient Inter-chip Asynchronous Communication Link |
Abstract | ||
|---|---|---|
A single-ended-style current-mode circuit with quaternary current signaling is proposed for an energy-efficient asynchronous communication link. The use of quaternary-encoded current signaling and dynamic current-feedback mechanism makes information density twice per wire because of small signal-voltage swing with maintaining high-speed switching capability, which resulting in energy-efficient asynchronous data transmission. It is demonstrated that the proposed link with a 10mm inter-chip transmission line achieves the throughput of 1.1Gbps per wire at the power supply of 1.2V under a 130nm CMOS technology. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/ISMVL.2014.20 | Multiple-Valued Logic |
Keywords | Field | DocType |
CMOS logic circuits,asynchronous circuits,current-mode circuits,network-on-chip,telecommunication links,transmission lines,CMOS technology,bit rate 1.1 Gbit/s,dynamic current-feedback mechanism,energy-efficient asynchronous data transmission,energy-efficient inter-chip asynchronous communication link,high-speed switching capability,inter-chip transmission line,network-on-chip,power supply,quaternary single-ended current-mode circuit,quaternary-encoded current signaling,size 10 mm,size 130 nm,small signal-voltage swing,voltage 1.2 V,NoC,asynchronous communication link,current-mode,multiple-valued,network on chip | Asynchronous communication,Transmission line,Data transmission,Computer science,Network on a chip,Chip,CMOS,Electric power transmission,Electronic engineering,Throughput | Conference |
ISSN | Citations | PageRank |
0195-623X | 2 | 0.39 |
References | Authors | |
6 | 3 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Akira Mochizuki | 1 | 61 | 9.26 |
| Hirokatsu Shirahama | 2 | 28 | 5.25 |
| Takahiro Hanyu | 3 | 441 | 78.58 |