Name
Abstract | ||
|---|---|---|
This paper presents design and implementation of a 12-GS/s fully differential data acquisition (DAQ) system-on-chip (SoC) fabricated in a standard 130-nm CMOS process. The proposed DAQ is comprised of a 4-bit flash ADC and four channels of 1:32 demultiplexer (DEMUX) with on-chip custom registers. At 12-GS/s sampling rate, the DAQ SoC achieves an SNDR of 19.2 dB for 2.9-GHz input signal and 24.2 dB for low-frequency inputs. The flash ADC and each DEMUX channel consume 200and 260-mA from 1.3 V supply and occupy an active area of 0.85 and 0.70 mm2, respectively. The DAQ SoC does not employ time interleaving and calibration techniques. In the meantime, no BWor speed-enhancing inductors have been used in the proposed system. The DAQ prototype achieves the highest sampling rate in 130-nm CMOS technology. |
Year | DOI | Venue |
|---|---|---|
2014 | 10.1109/TVLSI.2013.2287261 | VLSI) Systems, IEEE Transactions |
Keywords | Field | DocType |
CMOS digital integrated circuits,data acquisition,integrated circuit design,system-on-chip,1:32 demultiplexer,CMOS fully differential data acquisition system-on-chip,DAQ SoC,DEMUX channel,current 200 mA,current 260 mA,flash ADC,frequency 2.9 GHz,low-frequency inputs,on-chip custom registers,size 130 nm,voltage 1.3 V,word length 4 bit,Analog-to-digital conversion,data acquisition (DAQ),demultiplexer (DEMUX),flash analog-to-digital converter (ADC),flash analog-to-digital converter (ADC). | Demultiplexer,4-bit,Computer science,Sampling (signal processing),Data acquisition,Communication channel,Multiplexer,CMOS,Electronic engineering,Flash ADC,Computer hardware | Journal |
Volume | Issue | ISSN |
22 | 10 | 1063-8210 |
Citations | PageRank | References |
0 | 0.34 | 5 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Behrooz Javid | 1 | 0 | 0.34 |
| Payam Heydari | 2 | 649 | 75.49 |