Name
Abstract | ||
|---|---|---|
This paper proposes persistent transactional memory (PTM), a new design that adds durability to transactional memory (TM) by incorporating with the emerging non-volatile memory (NVM). PTM dynamically tracks transactional updates to cache lines to ensure the ACI (atomicity, consistency and isolation) properties during cache flushes and leverages an undo log in NVM to ensure PTM can always consistently recover transactional data structures from a machine crash. This paper describes the PTM design based on Intel’s restricted transactional memory. A preliminary evaluation using a concurrent key/value store and a database with a cache-based simulator shows that the additional cache line flushes are small. |
Year | DOI | Venue |
|---|---|---|
2015 | 10.1109/LCA.2014.2329832 | Computer Architecture Letters |
Keywords | Field | DocType |
databases,registers,nonvolatile memory,hardware,data structures | Cache pollution,Computer science,CPU cache,Parallel computing,Cache-only memory architecture,Transactional memory,Cache algorithms,Page cache,Non-uniform memory access,Cache coloring,Operating system | Journal |
Volume | Issue | ISSN |
PP | 99 | 1556-6056 |
Citations | PageRank | References |
5 | 0.43 | 0 |
Authors | ||
5 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| zhaoguo wang | 1 | 132 | 8.56 |
| han yi | 2 | 16 | 0.91 |
| Ran Liu 0003 | 3 | 5 | 0.43 |
| mingkai dong | 4 | 36 | 3.31 |
| haibo chen | 5 | 5 | 0.43 |