Title
10-ps Resolution hybrid time to digital converter in a 0.18 μm CMOS technology
Abstract
This paper presents a new Time to Digital Converter (TDC) design that combines the traditional Analog Time to Amplitude Converter (TAC) and Digital TDC techniques to obtain a very high adjustable time precision that could reach 10ps with a maximum dynamic range of 10 μs a DNL of 0.4 LSB a dead time of 15 ns. The proposed new “hybrid TDC” concept was used to design an array of 8 time interval measurement units for a Time correlated single photon counting(TCSPC) system in a 0.18 μm CMOS technology. The common Delay locked loop (DLL) and coarse counter approach makes the design flexible and easily scalable allowing the conception of larger TDC arrays without the need to implement several DLLs.
Year
DOI
Venue
2014
10.1109/NEWCAS.2014.6933995
NEWCAS
Keywords
Field
DocType
cmos digital integrated circuits,integrated circuit design,time-digital conversion,8 time interval measurement unit array design,cmos technology,dlls,dnl,lsb,tac,tcspc system,tdc design,analog time to amplitude converter,coarse counter approach,digital tdc techniques,hybrid time to digital converter resolution,size 0.18 mum,time 10 ps,time 15 ns,time correlated single photon counting system,delay locked loop (dll),time interval measurement,time to analog converter(tac),time to digital converter (tdc),dynamic range,detectors,cmos integrated circuits
Photon counting,Dead time,Dynamic range,Computer science,Delay-locked loop,Electronic engineering,CMOS,Computer hardware,Time-to-digital converter,Least significant bit,Scalability
Conference
ISSN
Citations 
PageRank 
2472-467X
2
0.40
References 
Authors
5
5
Name
Order
Citations
PageRank
Imane Malass142.49
Wilfried Uhring245.19
Jean-Pierre Le Normand343.16
Norbert Dumas443.16
Foudil Dadouche542.15