Abstract | ||
---|---|---|
Phase-Change Memory (PCM) is new memory technology and a possible replacement for DRAM, whose scaling limitations require new lithography technologies. Despite being promising, PCM has limited endurance (its cells withstand roughly 108 bit-flips before failing), which prompted the adoption of Error Correction Techniques (ECTs). However, previous lifetime analyses of ECTs did not consider the difference between the bit-flip frequencies of data and code bits, which may lead to inaccurate wear-out analyses for the ECTs. In this work, we improve the wear-out analysis of PCM by modeling and analyzing the bit-flip probabilities of five ECTs. Our models also enable an accurate estimation of energy consumption and analysis of the endurance-energy trade-off for each ECT. |
Year | DOI | Venue |
---|---|---|
2014 | 10.7873/DATE.2014.047 | Design, Automation and Test in Europe Conference and Exhibition |
Keywords | Field | DocType |
error correction,integrated circuit reliability,lithography,phase change memories,probability,DRAM replacement,ECT,PCM,bit-flip frequency,bit-flip probabilities,endurance-energy trade-off,energy consumption estimation,error correction technique,lifetime analysis,lithography technology,phase-change memory,scaling limitations,wear-out analysis | Dram,Phase-change memory,Computer science,Parallel computing,Electronic engineering,Error detection and correction,Lithography,Energy consumption,Scaling | Conference |
ISSN | Citations | PageRank |
1530-1591 | 0 | 0.34 |
References | Authors | |
3 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Caio Hoffman | 1 | 0 | 0.68 |
Luiz Ramos | 2 | 0 | 0.34 |
Rodolfo Azevedo | 3 | 271 | 30.84 |
Guido Araujo | 4 | 40 | 5.23 |