Title
A Novel Prefetch Technique for High Performance Embedded System
Abstract
Improving the performance of embedded systems can be supported by increasing the hit rates of last level caches (LLC). To enhance the hit rates of LLC, we propose a new prefetch technique. The proposed prefetch technique can fetch the data from main memory prior to actual requests to reduce the long latency to the main memory. To support the proposed technique, we introduce a new structure, LLC buffer which contains several memory blocks nearby the previous referenced memory block. In case that the LLC capacity is not enough, the proposed prefetch technique can improve the performance of embedded systems significantly.
Year
DOI
Venue
2014
10.1109/ICITCS.2014.7021713
ICITCS
Keywords
Field
DocType
embedded systems,storage management,llc capacity,high performance embedded system,last level caches,memory blocks,novel prefetch technique
Memory block,Computer science,Latency (engineering),Fetch,Instruction prefetch,Embedded system
Conference
ISSN
Citations 
PageRank 
2473-0122
0
0.34
References 
Authors
6
4
Name
Order
Citations
PageRank
Hong Jun Choi1305.74
Dong Oh Son2214.19
Cheol Hong Kim37324.39
Jong Myron Kim400.34