Name
Abstract | ||
|---|---|---|
Two measures of test confidence in tested circuits are presented. One takes into account all circuits tested and appears to be a novel measure that is of interest to circuit manufacturers. The other measure, which has already been introduced, takes into account only those circuits that have passed the test and is of interest to the circuit user. Both measures are functions of the same variable, called faulty circuit coverage, which quantifies the confidence in the test sequence. This variable is rather difficult to compute. Therefore a novel approach to approximate the faulty circuit coverage, based on a partition of the prescribed set of faults, is proposed.<> |
Year | DOI | Venue |
|---|---|---|
1989 | 10.1109/FTCS.1989.105584 | Chicago, IL, USA |
Keywords | Field | DocType |
fault location,logic testing,circuit manufacturers,faulty circuit coverage,logic testing,test confidence estimation,test sequence,tested circuits | Automatic test pattern generation,Fault detection and isolation,Logic testing,Test sequence,Engineering,Electronic circuit,Partition (number theory),Reliability engineering | Conference |
Citations | PageRank | References |
11 | 0.74 | 4 |
Authors | ||
2 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Mireille Jacomino | 1 | 77 | 11.17 |
| Rene David | 2 | 11 | 1.08 |