Title
An ASIC-architecture for VLSI-implementation of the RBN-algorithm
Abstract
An optimized recursive binary nesting (RBN) algorithm for coding true color documents is presented. The RBN compression in which algorithm is a segmentation algorithm in which a picture is subdivided into regions with equal properties and for each region only the relevant information for the human eye is kept. Thus, the compressed image consists of segmentation information and the information of the picture behavior in those regions. The picture is subsampled on a quadtree based lattice (segmentation information). The inner pixels are approximated with the use of four lattice corner pixels (pictorial behavior). The subdivision in blocks has to be a function of the image contents. The size of the initial blocks is 65×65. Each pixel in the block is approximated as a weighted average of the four corner pixels (bilinear interpolation). The efficient VLSI architecture used to implement the algorithm is termed the lowly multiplexed cooperating data-path style. Several other designs under consideration are briefly reviewed
Year
DOI
Venue
1990
10.1109/ICPR.1990.119391
Pattern Recognition, 1990. Proceedings., 10th International Conference  
Keywords
DocType
Volume
vlsi,application specific integrated circuits,computer vision,data compression,digital signal processing chips,encoding,asic,rbn-algorithm,vlsi architecture,image segmentation,quadtree based lattice,recursive binary nesting,throughput,color,process design,channel capacity,compression algorithms,parallel processing,algorithm design and analysis
Conference
ii
Citations 
PageRank 
References 
1
0.38
4
Authors
4
Name
Order
Citations
PageRank
Gijbels, T.110.38
Van Eycken, L.210.38
Oosterlinck, A.3711254.21
Note, S.410.38