Name
Abstract | ||
|---|---|---|
Efficient image processing from a low level to a higher level on a PSM system is described. PSM is a multiprocessor system architecture with pipelined multiple-instruction multiple-data (MIMD) processors, shared memory, and a multistage interconnection network designed for high-speed parallel image processing. A parallel image processor, PSM-32, which is being constructed based on the PSM architecture, is discussed. To ensure total efficient instruction and data flows in the presence of the memory access delays commonly occurring on a multistage interconnection network machine, an architecture with a pipelined MIMD processor is proposed for the PSM system |
Year | DOI | Venue |
|---|---|---|
1990 | 10.1109/ICPR.1990.119398 | Pattern Recognition, 1990. Proceedings., 10th International Conference |
Keywords | DocType | Volume |
computer vision,computerised picture processing,multiprocessing systems,parallel architectures,parallel machines,pipeline processing,psm-32,data flows,image processings,multiprocessor system architecture,multistage interconnection network,parallel processing,pipelined mimd processor,shared memory,image segmentation,data structures,hardware,image analysis,data flow,image processing,pixel | Conference | ii |
Citations | PageRank | References |
2 | 0.42 | 2 |
Authors | ||
3 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Koichiro Deguchi | 1 | 519 | 69.40 |
| Tago, K. | 2 | 29 | 5.26 |
| Iwao Morishita | 3 | 14 | 8.88 |