Paper Info
Title
Implementation of an MHT-based object detection algorithm on a 2-D processor mesh
Abstract
The mapping of multistage hypothesis testing (MHT)-based algorithms to two-dimensional mesh architectures is discussed. How the interprocessor communication overhead varies as a function of the grain-size of the architecture is discussed. The speedup achievable by a processor mesh relative to a single processor is calculated as a function of the cost of interprocessor communication. It is shown that the smaller the mesh grain-size, the greater the speedup of the MHT-based algorithm, even for very expensive interprocessor communication costs
Year
DOI
Venue
1990
10.1109/ICPR.1990.119414
Pattern Recognition, 1990. Proceedings., 10th International Conference  
Keywords
DocType
Volume
computerised pattern recognition,computerised picture processing,parallel processing,interprocessor communication,mapping,mesh architectures,multistage hypothesis testing,object detection,testing,cost function,spatial resolution,computer architecture,filtering,image resolution,trajectory,grain size,hypothesis test
Conference
ii
Citations 
PageRank 
References 
0
0.34
2
Authors
2
Name
Order
Citations
PageRank
Steven D. Blostein132961.46
Huang, T.S.21732.77