Name
Abstract | ||
|---|---|---|
A unified multilevel mixed-mode simulation capability for mixed analog/digital integrated circuits is described. First, a methodology for describing arbitrary analog or mixed analog/digital blocks at the behavioral level is proposed. In order to verify such models, a verification tool has been developed. The tools modgens and modgenz convert transfer functions H(s) and H(z), respectively, into state space representations in the time domain and generate behavioral models. Thus, the methodology allows digital, analog, and mixed analog/digital subcircuits to be described at various levels. While the analog portions of the circuit are simulated with high accuracy, the digital portions can be simulated in various models. Simulation is event-driven. For the behavioral analog models, block elimination with unique reordering and pivoting techniques are used to accommodate state variables. This capability has been integrated into the MOTIS3 design verification system. The simulation of representative mixed analog/digital simulation examples is described |
Year | DOI | Venue |
|---|---|---|
1992 | 10.1109/43.127619 | Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions |
Keywords | DocType | Volume |
application specific integrated circuits,circuit analysis computing,M3,MOTIS3 design verification system,behavioral analog models,behavioral level,block elimination,mixed analog/digital integrated circuits,mixed-mode simulation,multilevel mixed-mode mixed A/D simulator,reordering and pivoting techniques,verification tool | Journal | 11 |
Issue | ISSN | Citations |
5 | 0278-0070 | 3 |
PageRank | References | Authors |
0.64 | 0 | 3 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Rakesh Chadha | 1 | 15 | 7.41 |
| C. Visweswariah | 2 | 507 | 58.12 |
| Chin-Fu Chen | 3 | 363 | 35.23 |