Paper Info
Title
A fast division algorithm for VLSI
Abstract
A novel and fast method for VLSI division is presented. The method is based on Svoboda's algorithm and uses the radix-2 signed-digit number system to give a divider in which quotient bit selection is a function of the two most significant digits of the current partial remainder. An n-bit divider produces an n-bit quotient in redundant form in 3n gate delays using n(n-1) controlled full add/subtract circuits. Operand pre-scaling necessary for the algorithm is accomplished by a single subtraction
Year
DOI
Venue
1991
10.1109/ICCD.1991.139973
Cambridge, MA
Keywords
Field
DocType
VLSI,delays,digital arithmetic,3n gate delays,Svoboda's algorithm,VLSI,fast division algorithm,n-bit divider,n-bit quotient,operand prescaling,quotient bit selection,radix-2 signed-digit number system
Division algorithm,Computer science,Floating point,Quotient,Operand,Parallel computing,Remainder,Arithmetic,Electronic engineering,Electronic circuit,Very-large-scale integration,Subtraction
Conference
ISBN
Citations 
PageRank 
0-8186-2270-9
14
1.17
References 
Authors
7
1
Name
Order
Citations
PageRank
Burgess, N.1141.17