Abstract | ||
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A novel rate control scheme is proposed dedicatedly for JPEG2000 image coding. By predicting bitrate of coded data and updating it adaptively, the proposed scheme can be executed in parallel with the code-block coding of code-block coding such as coefficient bit modeling and arithmetic coding. The proposed scheme successfully reduces computational cost and working memory size of the process down to 29% and 13%, respectively, comparing to a conventional approach in case of 1/16 compression, and hence is suitable to be used in embedded systems. |
Year | DOI | Venue |
---|---|---|
2002 | 10.1109/ISCAS.2002.1010458 | Circuits and Systems, 2002. ISCAS 2002. IEEE International Symposium |
Keywords | Field | DocType |
adaptive signal processing,arithmetic codes,block codes,embedded systems,image coding,JPEG2000 adaptive rate control,arithmetic coding,bitrate,code-block coding,coded data,coefficient bit modeling,computational cost,embedded systems,image coding,working memory size | Tunstall coding,Coding tree unit,Computer science,Context-adaptive variable-length coding,Sub-band coding,Harmonic Vector Excitation Coding,Shannon–Fano coding,Variable-length code,Embedded system,Context-adaptive binary arithmetic coding | Conference |
Volume | Citations | PageRank |
4 | 10 | 0.98 |
References | Authors | |
0 | 4 |
Name | Order | Citations | PageRank |
---|---|---|---|
Masuzaki, T. | 1 | 10 | 0.98 |
H. Tsutsui | 2 | 47 | 9.79 |
Tomonori Izumi | 3 | 34 | 20.88 |
Onoye, T. | 4 | 14 | 2.10 |