Name
Abstract | ||
|---|---|---|
The increasing gap between processor and memory performance has led to new architectural models for memory-intensive applications. In this paper, we use a set of memory-intensive benchmarks to evaluate a mixed logic and DRAM processor called VIRAM as a building block for scientific computing. For each benchmark, we explore the fundamental hardware requirements of the problem as well as alternative algorithms and data structures that can help expose fine-grained parallelism or simplify memory access patterns. Results indicate that VIRAM is significantly faster than conventional cache-based machines for problems that are truly limited by the memory system and that it has a significant power advantage across all the benchmarks. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1109/IPDPS.2002.1015506 | Ft. Lauderdale, FL |
Keywords | Field | DocType |
dram chips,data structures,memory architecture,parallel processing,performance evaluation,dram processor,iram,viram,architectural models,fine-grained parallelism,memory access,memory-intensive benchmarks,mixed logic,algorithms,application software,hardware,performance,engineering,bandwidth,registers,computer architecture,arithmetic,scientific computing,process design,parallel programming,artificial intelligence | Pipeline burst cache,Dram,Data structure,Cache,Computer science,Parallel computing,Process design,Bandwidth (signal processing),Application software,Memory architecture | Conference |
ISBN | Citations | PageRank |
0-7695-1573-8 | 17 | 0.91 |
References | Authors | |
10 | 6 | |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Brian R. Gaeke | 1 | 17 | 0.91 |
| Parry Husbands | 2 | 561 | 56.37 |
| Xiaoye S. Li | 3 | 1042 | 98.22 |
| leonid oliker | 4 | 1358 | 145.15 |
| Katherine A. Yelick | 5 | 3494 | 407.23 |
| Rupak Biswas | 6 | 922 | 109.66 |