Name
Abstract | ||
|---|---|---|
An approach to the automatic generation of schematic diagrams from circuit descriptions is presented. The heuristics that make up the system are based on two principles of schematics readability: functional identification and traceability. SPAR's generation process is broken into five distinct phases: partitioning the netlist, placement of components on the page, global routing, local routing, and the addition of I/O modules. All phases of the generation process use a two-dimensional space management technique based on virtual tile spaces. The global router is guided by a cost function consisting of both congestion and wirelength estimates. The local router uses a constraint-propagation technique to optimize the traceability of lines through congested areas. The data structures and algorithms used allow the system to support incremental additions to the schematic without complete regeneration. A technique for evaluating the quality of schematic drawings is described and applied to the present results |
Year | DOI | Venue |
|---|---|---|
1993 | 10.1109/43.238032 | Computer-Aided Design of Integrated Circuits and Systems, IEEE Transactions |
Keywords | DocType | Volume |
circuit diagrams,circuit layout CAD,network routing,wiring,I/O modules,SPAR,automatic generation,circuit descriptions,congestion,constraint-propagation technique,cost function,data structures,functional identification,global routing,local routing,partitioning,placement,schematic diagrams,schematic place and route system,traceability,two-dimensional space management technique,virtual tile spaces,wirelength estimates | Journal | 12 |
Issue | ISSN | Citations |
7 | 0278-0070 | 0 |
PageRank | References | Authors |
0.34 | 10 | 2 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Frezza, S.T. | 1 | 0 | 0.34 |
| Levitan, S.P. | 2 | 0 | 0.34 |