Name
Abstract | ||
|---|---|---|
A method is presented for analog soft-decision decoding of block product codes (block turbo codes). Extrinsic information is exchanged as analog signals between component row and column decoders. The component MAP decoders use low-power analog computation in subthreshold CMOS circuits to implement the sum-product algorithm. An example decoder design is presented for a (16, 11)2 Hamming code. |
Year | DOI | Keywords |
|---|---|---|
2001 | 10.1109/ISIT.2002.1023502 | cmos analogue integrated circuits,hamming codes,block codes,maximum likelihood decoding,product codes,turbo codes,hamming code,analog circuits,analog signals,analog soft-decision decoding,block product codes,block turbo codes,component map decoders,component column decoders,component row decoders,decoder design,low-power analog computation,subthreshold cmos circuits,sum-product algorithm,analog computers,decoding,pipelines,factor graph |
Field | DocType | ISBN |
Concatenated error correction code,Sequential decoding,Computer science,Turbo code,Serial concatenated convolutional codes,Block code,Theoretical computer science,Coding theory,Linear code,List decoding | Conference | 0-7803-7501-7 |
Citations | PageRank | References |
0 | 0.34 | 3 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| Winstead, C. | 1 | 0 | 0.34 |
| Jie Dai | 2 | 0 | 0.68 |
| Yu, S. | 3 | 13 | 1.78 |
| Reid R Harrison | 4 | 222 | 57.49 |