Name
Abstract | ||
|---|---|---|
Concurrent test features are available in the SoC testers to increase ATE throughput. To exploit these new features design modifications are necessary. In a case study, these modifications were applied to the open source LEON SoC platform containing an embedded 32 bit CPU, an AMBA bus, and several embedded cores. The concurrent test of LEON was performed on an SoC tester. The gain in test application time and area costs are quantified and obstacles in the design flow or concurrent test are discussed. |
Year | DOI | Venue |
|---|---|---|
2002 | 10.1109/TEST.2002.1041875 | ITC |
Keywords | Field | DocType |
automatic test equipment,circuit CAD,integrated circuit design,integrated circuit testing,system-on-chip,32 bit,AMBA bus,ATE compatible SoC adaption,ATE concurrent test capabilities,ATE throughput,EDA tools,SoC testers,concurrent test design flow,embedded CPU,embedded cores,modification area costs,open source LEON SoC platform,system-on-chip design modifications,test application time,test resource partitioning | 32-bit,System on a chip,Automatic test equipment,System testing,Computer science,Design flow,Integrated circuit design,Electronic design automation,Built-in self-test,Embedded system | Conference |
ISSN | ISBN | Citations |
1089-3539 | 0-7803-7542-4 | 17 |
PageRank | References | Authors |
1.41 | 14 | 4 |
Name | Order | Citations | PageRank |
|---|---|---|---|
| Rainer Dorsch | 1 | 135 | 12.60 |
| Ramón Huerta Rivera | 2 | 17 | 1.41 |
| Hans-Joachim Wunderlich | 3 | 1822 | 155.30 |
| Martin Fischer | 4 | 17 | 1.41 |