Name
Abstract | ||
|---|---|---|
The 21164 is a new quad-issue superscalar Alpha microprocessor. This new high-performance chip can execute 1.2 billion instructions per second. The part became available in January of 1995 and delivered SPECint92/SPECfp92 performance of 335/500 (estimated), performance unmatched by other commercially available microprocessors. It is implemented in 0.5 micron CMOS and the CPU clock speed is 300 MHz. Instruction execution is controlled by the quad-issue superscalar instruction unit. There are two 64-bit integer execution pipelines and two 64-bit floating-point pipelines. Memory instructions are initiated in the integer pipelines and are completed by the memory and bus interface units that together implement a high-throughput memory subsystem employing a multi-level cache hierarchy. |
Year | DOI | Venue |
|---|---|---|
1995 | 10.1109/40.372349 | IEEE Micro |
Keywords | Field | DocType |
cmos integrated circuits,instruction sets,microprocessor chips,0.5 micron,21164 alpha microprocessor,300 mhz,cmos chip,high clock rate,high-throughput/nonblocking memory systems,low operational latency,superscalar instruction execution | Instruction set,Computer science,Latency (engineering),Parallel computing,Real-time computing,CMOS,Memory systems,Superscalar,Alpha microprocessor,Instructions per second,Clock rate | Journal |
Volume | Issue | ISSN |
15 | 2 | 0272-1732 |
Citations | PageRank | References |
58 | 60.52 | 4 |
Authors | ||
4 | ||
Name | Order | Citations | PageRank |
|---|---|---|---|
| John H. Edmondson | 1 | 222 | 194.79 |
| Paul I. Rubinfeld | 2 | 171 | 161.38 |
| Ronald P. Preston | 3 | 305 | 262.84 |
| Vidya Rajagopalan | 4 | 271 | 293.84 |